A nonvolatile semiconductor memory device is an information storage device including a memory (nonvolatile semiconductor memory) configured of semiconductor elements that maintain stored information after the power supply is turned off. Some types of nonvolatile semiconductor memories hold information in accordance with the amount of charge that corresponds to the applied voltage or the like. In such nonvolatile semiconductor memories, information is read depending on whether the amount of charge is larger than a threshold value.
Furthermore, in some types of nonvolatile semiconductor memories, parameters that are required when the amount of accumulated charge exceeds the threshold value differ among nonvolatile semiconductor memory chips or among blocks that are units of data erasing in accordance with electrical characteristics of the chips.
In addition, there are some types in which the insulators of memory cells become deteriorated in accordance with the number of times of accumulating charge in the memory cells and the number of times of removing charge from the memory cells and thus parameters required when the voltage exceeds the threshold value become different.
Examples of such nonvolatile semiconductor memory devices include a nonvolatile semiconductor memory using NAND-type flash memories as memory cells.
To cope with differences in necessary threshold voltages for different chips or different blocks of a NAND-type flash memory, a technology has been proposed that the minimum value and distribution of gate voltages corresponding to the applied write pulse voltage are obtained, and write pulse voltages are changed in accordance with the electrical characteristics of the memory cell for each chip or block. In this manner, no excessive stress caused by the electric field between the semiconductor substrate and the floating gate is applied to the tunnel oxide film of the memory cell at the time of erasing data. Furthermore, the data holding reliability of the flash memory is prevented from being degraded, and the data writing speed is also prevented from being lowered because the threshold voltage of the memory cell is brought to a level greater than or equal to the reference threshold voltage by applying a data write pulse voltage.
To cope with the differences in necessary threshold voltages caused by the deteriorated insulators of the memory cells, a technology of checking an appropriate value for a parameter by use of a deterioration monitoring cell to which the same level of stress as the one to the memory cells is applied has been proposed. Test data is written into and read from the deterioration monitoring cell to find a parameter with which information can be accurately read and no excessive stress is applied to the tunnel insulation film, and a pulse is applied to the memory cells by use of this parameter. In this manner, an application voltage can be selected in accordance with the deterioration level of the tunnel insulation film of the memory cells. Hence, the threshold value can be changed in accordance with the deterioration level of the tunnel insulation film caused by the data writing and erasing, the excessive stress placed onto the tunnel insulation film can be alleviated, and the data holding reliability of the flash memory can be prevented from being deteriorated.
With the conventional technology, however, a monitoring cell is required for each chip or block and for each number of writing and erasing operations to change the pulse voltage in accordance with the electrical characteristics of the memory cells for each chip or block and also with the number of information writing and erasing operations. If monitoring cells are prepared for all the chips and blocks and for all the numbers of writing and erasing operations, the number of memory cells that store therein information has to be reduced.